13 December 2010

Intel and IQE report InGaAs QWFETs for low-power logic

At the 56th annual IEEE International Electronic Devices Meeting (IEDM 2010) in San Francisco, CA, USA last week (6–8 December), microprocessor maker Intel Corp and epiwafer foundry and substrate maker IQE plc of Cardiff, Wales, UK presented a joint paper on the development of indium gallium arsenide (InGaAs) quantum well field-effect transistors (QWFETs) for low-power logic applications.

Presented by Intel’s Dr Marko Radosavljevic, the paper detailed work performed by scientists at Intel’s Technology and Manufacturing Group in Oregon and IQE’s epitaxial growth facility in Bethlehem, PA.

The paper ‘Non-Planar, Multi-Gate InGaAs Quantum Well Field Effect Transistors with High-K Gate Dielectric and Ultra-Scaled Gate-to-Drain/Gate-to-Source Separation for Low Power Logic Applications’ reports, for the first time it is claimed, the results of work on InGaAs QWFETs with high-K gate dielectric and ultra-scaled gate-to-drain and gate-to-source separations (LSIDE) of 5nm.

Fabricated by Intel using epitaxial wafers produced by IQE, the QWFET devices show improved enhancement-mode threshold voltage (VT) and significantly improved electro-statics, it is claimed. The results of the work demonstrate that a non-planar, multi-gate device architecture is an effective way to improve the scalability of III-V QWFETs for low-power logic applications, the firms add.

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Mid-decade timescale for compound/silicon semiconductor integration

Tags: Intel IQE InGaAs QWFETs

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