New MEMS White Paper

Download the latest Logitech white paper and learn more about MEMS processing technology and techniques

Download our CMP White Paper

FREE subscription
Subscribe for free to receive each issue of Semiconductor Today magazine and weekly news brief.


















28 February 2007


Forschungszentrum Jülich orders Aixtron ALD and AVD modules for CMOS transistor gate stacks and Si nanowires

Germany’s Forschungszentrum Jülich ordered two Aixtron Tricent deposition modules in the forth quarter of 2006; both acquired within the framework of a BMBF (Bundesministerium für Bildung und Forschung – the Federal Ministry of Education and Research) funded project.

The systems will be used to develop advanced thin film processes for CMOS transistor gate stacks and silicon nanowire structures. Furthermore, as part of the process and material development work, FZ Jülich and Aixtron have a cooperation and demonstration laboratory agreement.

FZ Jülich will use Aixtron’s Tricent ALD (Atomic Layer Deposition) module to deposit alternative high-k dielectric films, and a Tricent AVD (Atomic Vapor Deposition) module to deposit metallic/metal nitride electrode films. Both modules will be added to the  automated 200/300 mm wafer handling platform, which already has an Aixtron Tricent CVD (Chemical Vapor Deposition) module for SiGe processing.

Prof. Dr Siegfried Mantl of the Institute of Bio- and Nano-Systems (IBN) at the Forschungszentrum Jülich said: “New advanced materials are key for faster transistors, which are required for the information technology of tomorrow. The actual BMBF funding for the Forschungszentrum Jülich is aimed to strengthen our research on silicon, in particular in view of innovative silicon based nano-electronics. Exceptionally promising is the so called strained silicon on insulator (SSOI) technology, one of the Jülich developments. The integration of the new Aixtron modules onto the cluster tool allows the synthesis of new materials on the atomic scale. We will be capable to grow highly uniform high-k dielectric films down to a few atomic layers on large area structured wafers. Combined with the strained silicon technology and the thin film deposition of metal nitride electrodes we will implement an enabling technology for the development of powerful nano-transistors.”