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23 November 2006


Innos supporting SiNANO project

UK nanotech R&D company Innos (formerly the Silicon Fabrication Facility at the University of Southampton) is to provide integration engineering support and prototyping services for the UK Framework 6 Network of Excellence SiNANO (Silicon-based Nanodevices) project, with the UK Engineering and Physical Sciences Research Council (EPSRC) providing UK academic partners with additional access to the Innos fabrication facility.

Launched in January 2004, SiNANO is a Network of Excellence funded by the European Commission under its 6th Framework Programme for Research and Technological Development. The underlying principle is to explore different technology routes to enhancing device performance and integration in very high-speed silicon-based nanoscale devices, for adoption in future terascale
ICs for communications and computing technology. The project gathers 44 universities, research centers and enterprises from 16 European countries, representing more than 300 researchers and PhD students.

Each project partner provides different areas of expertise required, from design and fabrication through to characterization and device modeling. Innos is supporting the four main UK academic partners:

  • the University of Warwick: a team headed by professors Evan Parker and Terry Wall is investigating the properties of silicon-germanium and its development, through a set of oxidization processes and a CMOS batch;
  • the University of Cambridge: a team led by Dr Douglas J.Paul at the Cavendish Laboratory aims to integrate SiGe quantum devices with strained-Si
  • the University of Newcastle: a team led by professor Anthony O'Neal is already working on strained Si heterojunction bipolar transistors and will soon be developing novel strained Si CMOS;
  • the University of Southampton: a team headed by professor Peter Ashburn is tackling vertical gate MOSFETs for use in 'ambient intelligence' technology,
    and post-CMOS devices that look at ways of extending the life of traditional CMOS devices.

To support the partners, Innos has set up an internal task force led by commercial integration engineer Dr Riccardo Varrazza. A team of engineers directed by process engineer Dr Enrico Gili is developing and managing the engineering and fabrication of the prototype devices. This aims to allow
Innos to focus on the project management and integration engineering issues of the work carried out with each SiNANO partner, while the academics focus on the research.

"Even though each partner is investigating a different area of nanoscale silicon application, our engineers are able to provide prototyping for the different devices for each partner so that they can concentrate on the research elements," said Gili.

"Achieving the production of IC components at nanometric dimensions could herald a revolution in IC technology, involving the integration of nanoscale CMOS and emerging post-CMOS logic and memory devices," adds Varrazza.

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