News: Microelectronics
18 December 2024
APECS pilot line starts operation
Within the framework of the EU Chips Act, the APECS pilot line has begun operation, providing large industry players, SMEs and start-ups with access to cutting-edge technology for ‘Advanced Packaging and Heterogeneous Integration for Electronic Components and Systems’ as it aims to establish a foundation for resilient and robust European semiconductor supply chains.
Total funding of €730m over 4.5 years comes from the Chips Joint Undertaking and the funding authorities of the nations involved, through the ‘Chips for Europe’ initiative. Specifically, the APECS consortium brings together the technological competences, infrastructure and expertise of ten partners from eight European countries: Germany (Fraunhofer-Gesellschaft as coordinator, FBH, IHP), Austria (TU Graz), Finland (VTT), Belgium (imec), France (CEA-Leti), Greece (FORTH), Spain (IMB-CNM, CSIC) and Portugal (INL).
APECS is implemented by the Research Fab Microelectronics Germany (FMD). Within APECS, the institutes collaborating in FMD will work closely with European partners, to contribute to the European Union´s goals of increasing technological resilience, strengthening cross-border collaboration and enhancing global competitiveness in semiconductor technologies.
The APECS pilot line focuses on bridging application-oriented research with innovative developments in heterogeneous integration, in particular emerging chiplet technologies. By pushing beyond conventional system-in-package (SiP) methods, APECS aims to deliver robust and trusted heterogeneous systems, boosting the innovation capacity of the European semiconductor industry.
Due to substantial funding from Germany’s Federal Ministry of Education and Research (BMBF) and the federal states of Saxony, Berlin, Bavaria, Schleswig-Holstein, Baden-Württemberg, North Rhine-Westphalia, Brandenburg, and Saxony-Anhalt, it will be possible to further expand the R&D infrastructure in the coming years within the framework of the APECS pilot line.
“APECS is an example how to connect research with business – it underscores how close cooperation with ministries and other partners can secure Europe´s position in the global microelectronics market,” says Fraunhofer-Gesellschaft’s president professor Holger Hanselka.
Single point of contact to APEC
The APECS pilot line aims to play a key role in supporting European microelectronics by developing new system integration technologies and unlocking new functionalities within the system-technology co-optimization (STCO) approach. This should enable European companies to develop advanced products, even in low quantities, at competitive costs. By providing a wide range of technologies on a single platform, APECS is positioned to become Europe’s leading hub for the development of advanced packaging and heterogeneous integration.
As a cooperation of the Fraunhofer Group for Microelectronics with the Leibniz institutes Leibniz institutes FBH (Ferdinand-Braun-Institut) and IHP (Institute for High Performance Microelectronics), the Research Fab Microelectronics Germany (FMD) is the central contact for all matters concerning micro- and nanoelectronics. As a one-stop shop, FMD has been combining scientific excellence, application-oriented technologies and system solutions of the 13 cooperating institutes from the Fraunhofer-Gesellschaft and Leibniz Association into a broad customer-tailored technology portfolio since 2017.
Users should benefit from a single point of contact to the APECS pilot line, since it will cover end-to-end design and pilot production capabilities and accelerate progress from cutting-edge research to practical, scalable manufacturing solutions.
Boosting innovation through multi-level collaboration
The APECS pilot line builds on structures established by FMD. In Germany, 12 institutes from the Fraunhofer Group for Microelectronics and the two Leibniz institutes FBH and IHP participate in APECS. The work is led by the central office in Berlin.
“For years, the FMD has successfully combined the strengths of decentralized research institutions with the collaborative potential of a centralized microelectronics hub. This illustrates how APECS is set to become a long-term accessible pilot line for all European stakeholders across the entire value chain,” says professor Albert Heuberger, spokesman of the Fraunhofer Group for Microelectronics and chairman of the FMD. “Together with the other EU Chips Act pilot lines, APECS will be a crucial component for heterogeneous integration and advanced packaging of the envisioned pan-European pilot line facility – and thus an indispensable instrument of EU Chips Act.”
Semiconductor R&D is at the core of current technological (r)evolutions, ranging from artificial intelligence and high-performance computing, modern defense systems to robotics, power electronics, wireless communication, e-healthcare, quantum technologies, and more. Such future electronic systems will require more and more functions that cannot be provided by a single chip, even if advanced system-on-chip (SoC) concepts are used. Heterogeneous integration will go beyond existing system-in-package (SiP) approaches. This concept of true heterogeneous integration is extremely important for next-generation devices based on future CMOS nodes, silicon germanium (SiGe), silicon carbide (SiC), III/Vs such as gallium arsenide (GaAs) or gallium nitride (GaN) and all different types of microelectromechanical systems (MEMS).
Intellectual property (IP) blocks made in different technology nodes will be combined on an active interposer to reduce cost by increasing the production yield (smaller chips) and reuse across applications. This will also touch upon environmental properties of electronics in terms of resource efficiency, critical raw materials, modularity and re-usability of design blocks.
