News: Microelectronics
9 December 2024
Imec integrates InP chiplet on 300mm RF silicon interposer, yielding 0.1dB insertion loss at 140GHz
At the 70th annual IEEE International Electron Devices Meeting (IEDM 2024) in San Francisco, CA, USA (7–11 December), nanoelectronics research center imec of Leuven, Belgium has presented results on the heterointegration of indium phosphide (InP) chiplets on a 300mm RF silicon interposer. The chiplets’ integration comes with a negligible 0.1dB insertion loss at 140GHz. In addition, no performance degradation is observed upon assembly of a two-stage InP power amplifier (PA). As the first to achieve this, imec claims that its findings mark a milestone in developing compact, energy-efficient modules for above-100GHz communication and radar sensing.
To meet the demand for faster data transfer, increased bandwidth and advanced imaging, next-generation communication and (radar) sensing systems must use higher frequency bands, notes imec. This shift requires compact, cost-optimized and energy-efficient components that operate at higher speeds and deliver more output power than current technologies.
Imec sees heterogeneous III–V/Si-CMOS technology as a promising path forward, with InP showing particular potential due to its high gain and power efficiency at mmWave and sub-THz frequencies. However, existing InP technology has several drawbacks, such as the use of small-sized wafers and processing via electron-beam lithography, while a large portion of the design area is occupied by passives and gold-based backends, limiting InP’s application to niche markets.
“By using InP only where its unmatched performance is essential, imec is paving the way toward scalable, cost-effective mmWave and sub-THz solutions,” imec’s Siddhartha Sinha, principal member of technical staff. “This is where a chiplet approach becomes essential.”
Insertion loss of 0.1dB at 140GHz, with no performance degradation in InP PA
Building on its silicon interposer technology, imec has adapted its expertise in 2.5 technology to enable next-gen RF applications, delivering ultra-low loss and compact integration for mmWave and sub-THz signals.
“Silicon interposer technology has been pivotal for digital and HPC use cases,” notes Siddhartha Sinha. “imec has extensive expertise in developing the underlying enablers, such as scaled micro-bumps, high-aspect-ratio TSVs [through-silicon vias], and multi-layer Cu damascene routing to meet these applications’ high-density routing needs,” he adds. “Leveraging this knowledge, we have now adapted silicon interposer technology to also suit RF applications by adding small, high-performance InP chiplets using CMOS-like processes.”
imec says that its RF interposer adds low-loss RF layers on top of a digital interposer to route mmWave signals. Utilizing small-footprint interconnects with a 40µm flip-chip pitch, the passive interconnects between the InP chiplets and the RF interposer show a 0.1dB insertion loss at 140GHz, which is negligible. In addition, a two-stage InP power amplifier (PA) demonstrates what is said to be excellent performance with no degradation observed after assembly, validating the effectiveness of the InP chiplet approach.
Making InP compatible with CMOS processing modules and toolsets
Building on the results presented at IEDM, imec continues to explore further interposer advancements as part of a broader program to make InP compatible with CMOS processing modules and toolsets.
“In addition to developing a demonstrator for mmWave phased arrays and radar applications, we aim to further shrink the size of the InP chiplets while preserving their superior RF performance,” says Siddhartha Sinha. “We also plan to add new Si RF interposer features to the platform, including passives-like inductors and MIMCAPs, as well as TSV integration and wafer thinning,” he adds. “At the same time, we’re making the platform available to partners for prototyping, allowing them to experiment with imec’s RF interposer R&D platform.”
